1. Field of the Invention
The present invention relates to a coating and developing system for coating a substrate, such as a semiconductor wafer or an LCD substrate, namely, a glass substrate for a liquid crystal display, with a resist solution by a coating process and processing the substrate by a developing process after exposure, a coating and developing method to be carried out by the coating and developing system, and a storage medium.
2. Description of the Related Art
A manufacturing process for manufacturing a semiconductor device or an LCD substrate forms a resist patter on a substrate by photolithography. Photolithography includes a series of steps of coating a surface of a substrate, such as a semiconductor wafer (hereinafter, referred to as “wafer”) with a resist film by applying a resist solution to the surface, exposing the resist film to light through a photomask, and processing the exposed resist film by a developing process to form a desired pattern.
Generally, those processes are carried out by a resist pattern forming system constructed by connecting an exposure system to a coating and developing system for coating a surface of a substrate with a resist solution and developing an exposed film. Such a resist pattern forming system is proposed in, for example, JP-A 2004-193597. Referring to FIG. 15 showing this known resist pattern forming system, a carrier 10 containing a plurality of wafers W is delivered to a carrier stage 11 included in a carrier block 1A, and a transfer arm 12 transfers the wafer W contained in the carrier 10 to a processing block 1B. Then, the wafer W is carried in the processing block 1B to an antireflection film forming module, an antireflection film is formed on a surface of the wafer W, and then the wafer W is carried to a coating module 13A to coat the antireflection film with a resist solution. Then, the wafer W is carried through an interface block 1C to an exposure system 1D. After the wafer W has been processed by an exposure process, the wafer W is returned to the processing block 1B. Then, the wafer W is processed by a developing process in a developing module 13B, and then the wafer W is returned to the carrier 10. The antireflection film forming module, not shown, is disposed, for example, under the coating module 13A or the developing module 13B.
Heating modules and cooling modules for processing a wafer W before and after processing the wafer W by the antireflection film forming module and the coating module 13A by a predetermined heating process and a predetermined cooling process, and transfer stages are stacked in layers in shelf modules 14 (shelf modules 14a to 14c). Two carrying devices 15A and 15B installed in the processing block 1B carry the wafer W in the processing block 1B from one to other of modules that receive the wafer W, such as the antireflection film forming module, the coating module 13A, the developing module 13, and component units of the shelf modules 14a to 14c. The wafer W is subjected to the foregoing processes. As mentioned in JP-A 2004-193597, wafers W to be subjected to the foregoing processes are carried to the modules according to a carrying schedule defining timing for carrying the wafers W to the modules, respectively.
The interface block 1C of this coating and developing system is provided with a buffer 16 capable of holding a plurality of wafers W. When the respective processing rates at which the processing block 1B and the exposure system 1D process substrates are different from each other, the buffer 16 is used to absorb the difference in processing rate between the processing block 1B and the exposure system 1D. For example, if the processing rate of the processing block 1B is higher than that of the exposure system 1D, wafers W processed by the processing block 1B are carried to the buffer 16, and the wafers W are held until times when the wafers W are to be carried to the exposure system 1D, respectively.
The buffer 16 is capable of holding all the wafers W existing in the processing block 1B when the exposure system 1D is stopped by some cause; that is, the number of wafers W that can be held by the buffer 16 is greater than the number of all the modules of the processing block 1B. For example, if the processing block 1B has fourteen modules, the buffer 16 can hold sixteen wafers W. Delivery of wafers W to the processing block 1B is stopped and wafers W existing in the processing block 1B are processed by all the processes to be carried out before processing the wafers W by the exposure process if the exposure system 1D is stopped. The buffer 16 has such a capacity to hold all those wafers W processed in the processing block 1B until the exposure system 1D resumes the exposure process. When the wafers W are held by the buffer 16, coating films formed on the wafers W and processed by the processes preceding the exposure process are in the same state and the quality of the coating films will not deteriorate even if the wafers W are held in that state. The coating film forming process can be continued by processing the wafers W by the exposure process after the exposure system 1D has resumed its operation, and thus the reduction of yield can be suppressed.
When the buffer 16 having a large capacity to hold many wafers W is installed in the interface block 1C, load on the carrying arm of the interface block IC in creases. Therefore, to achieve a desired throughput, two carrying chambers, namely, a first carrying chamber 17A and a second carrying chamber 17B, are formed in the interface block 1C of this coating and developing system, carrying arms 18A and 18B are installed in the carrying chambers 17A and 17B, respectively, to share the carrying load by the two carrying arms 18A and 18B. However, when the large buffer 16 having a large capacity, and the two carrying arms 18A and 18B are installed in the interface block 1C, the interface block 1C needs a large footprint, and the use of the two carrying arms 18A and 18B increases the manufacturing cost and the operation cost.
The inventors of the present invention are making efforts to improve carrying efficiency by reducing load on carrying means and to increase the throughput of the coating and developing system by forming an area in which modules for carrying out processes preceding the exposure process and an area in which modules for carrying out processes succeeding the exposure process in a vertical arrangement and installing carrying means in the two areas, respectively. A system having an area for the coating process and an area for the developing process formed in a vertical arrangement, and carrying means installed in those areas, respectively, is disclosed in JP-A 2006-203075.
Since the carrying means carry wafers W according to the carrying schedule in those areas, respectively, it is possible that the foregoing problems arise when the respective processing rates of the exposure system and the coating and developing system are different. Nothing is mentioned about this problem in JP-A 2006-203075.